/**
  ******************************************************************************
  * @file    acad_driver.h
  * @author  Sherlock
  * @version V0.1
  * @date    08/2/2024
  * @brief   Initial all Periphs
  ******************************************************************************
  * @copy
  *
  * <h2><center>&copy; COPYRIGHT 2010 Feirui</center></h2>
  */ 

#ifndef  __ACAD_DRIVER_H__
#define  __ACAD_DRIVER_H__

#ifdef __cplusplus
 extern "C" {
#endif


/**
  * @brief  INCLUDE FILES.
  */
#include "acad_cfg.h"


/**
  * @brief GLOBALS RAM definition
  */
#ifdef   ACAD_DRIVER_GLOBALS
#define  ACAD_DRIVER_EXT
#else
#define  ACAD_DRIVER_EXT  extern
#endif


/****************************************/
/* ADC1/2 Sample Freq configuration */
/****************************************/
#define TIM3CountCLK_FREQ                   ((uint32_t)6000000)   /* 6MHZ */
#define ADCSampleTIMx_RCCPeriph             RCC_APB1_PERIPH_TIM3
#define ADCSampleTIMx_Prescaler             (uint16_t)(SYSMAXCLK_FREQ/TIM3CountCLK_FREQ-1)
#define ADCSampleTIMx_CounterMode           TIM_CNT_MODE_CENTER_ALIGN1
#define ADCSampleTIMx_Period                300 //TIM3时钟频率10KHZ:144000k/(23+1)/300/2=10kHz
#define ADCSampleTIMx_ClockDivision         TIM_CLK_DIV1
#define ADCSampleTIMx_RepetitionCounter     0
#define ADCSampleTIMx                       TIM3
#define ADCSampleTIMx_ITx                   TIM_INT_TRIG
#define ADCSampleTIMx_FLAGx                 TIM_FLAG_TRIG


/****************************************/
/* ADC1/2 GPIO configuration */
/****************************************/
#define RCCPeriph_ADCGEN_U                  RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCGEN_U                  GPIO_Mode_AIN
#define GPIOSpeed_ADCGEN_U                  GPIO_Speed_50MHz
#define GPIOxPort_ADCGEN_U                  GPIOA
#define GPIOxBitx_ADCGEN_U                  GPIO_PIN_0

#define RCCPeriph_ADCGEN_V                  RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCGEN_V                  GPIO_Mode_AIN
#define GPIOSpeed_ADCGEN_V                  GPIO_Speed_50MHz
#define GPIOxPort_ADCGEN_V                  GPIOA
#define GPIOxBitx_ADCGEN_V                  GPIO_PIN_1

#define RCCPeriph_ADCGenEXCV                RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCGenEXCV                GPIO_Mode_AIN
#define GPIOSpeed_ADCGenEXCV                GPIO_Speed_50MHz
#define GPIOxPort_ADCGenEXCV                GPIOA
#define GPIOxBitx_ADCGenEXCV                GPIO_PIN_2
                                            
#define RCCPeriph_ADCGEN_W                  RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCGEN_W                  GPIO_Mode_AIN
#define GPIOSpeed_ADCGEN_W                  GPIO_Speed_50MHz
#define GPIOxPort_ADCGEN_W                  GPIOA
#define GPIOxBitx_ADCGEN_W                  GPIO_PIN_3

#define RCCPeriph_ADCDroopA            		  RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCDroopA             		GPIO_Mode_AIN
#define GPIOSpeed_ADCDroopA             		GPIO_Speed_50MHz
#define GPIOxPort_ADCDroopA             		GPIOA
#define GPIOxBitx_ADCDroopA             		GPIO_PIN_4

#define RCCPeriph_ADCDroopB                 RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCDroopB                 GPIO_Mode_AIN
#define GPIOSpeed_ADCDroopB                 GPIO_Speed_50MHz
#define GPIOxPort_ADCDroopB                 GPIOA
#define GPIOxBitx_ADCDroopB                 GPIO_PIN_5

#define RCCPeriph_ADCGenEXCI             	  RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCGenEXCI            		GPIO_Mode_AIN
#define GPIOSpeed_ADCGenEXCI            		GPIO_Speed_50MHz
#define GPIOxPort_ADCGenEXCI                GPIOA
#define GPIOxBitx_ADCGenEXCI            		GPIO_PIN_6

#define RCCPeriph_ADCDroopC                 RCC_APB2_PERIPH_GPIOA
#define GPIOModeI_ADCDroopC                 GPIO_Mode_AIN
#define GPIOSpeed_ADCDroopC                 GPIO_Speed_50MHz
#define GPIOxPort_ADCDroopC                 GPIOA
#define GPIOxBitx_ADCDroopC                 GPIO_PIN_7

#define RCCPeriph_ADCBuildVoltAFT           RCC_APB2_PERIPH_GPIOB
#define GPIOModeI_ADCBuildVoltAFT           GPIO_Mode_AIN
#define GPIOSpeed_ADCBuildVoltAFT           GPIO_Speed_50MHz
#define GPIOxPort_ADCBuildVoltAFT           GPIOB
#define GPIOxBitx_ADCBuildVoltAFT           GPIO_PIN_1

#define RCCPeriph_ADCBuildVoltBEF           RCC_APB2_PERIPH_GPIOB
#define GPIOModeI_ADCBuildVoltBEF           GPIO_Mode_AIN
#define GPIOSpeed_ADCBuildVoltBEF           GPIO_Speed_50MHz
#define GPIOxPort_ADCBuildVoltBEF           GPIOB
#define GPIOxBitx_ADCBuildVoltBEF           GPIO_PIN_2

#define RCCPeriph_ADCLOAD_U                 RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCLOAD_U                 GPIO_Mode_AIN
#define GPIOSpeed_ADCLOAD_U                 GPIO_Speed_50MHz
#define GPIOxPort_ADCLOAD_U                 GPIOC
#define GPIOxBitx_ADCLOAD_U                 GPIO_PIN_0

#define RCCPeriph_ADCLOAD_V                 RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCLOAD_V                 GPIO_Mode_AIN
#define GPIOSpeed_ADCLOAD_V                 GPIO_Speed_50MHz
#define GPIOxPort_ADCLOAD_V                 GPIOC
#define GPIOxBitx_ADCLOAD_V                 GPIO_PIN_1

#define RCCPeriph_ADCLOAD_W                 RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCLOAD_W                 GPIO_Mode_AIN
#define GPIOSpeed_ADCLOAD_W                 GPIO_Speed_50MHz
#define GPIOxPort_ADCLOAD_W                 GPIOC
#define GPIOxBitx_ADCLOAD_W                 GPIO_PIN_2

#define RCCPeriph_ADCVREF                   RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCVREF                   GPIO_Mode_AIN
#define GPIOSpeed_ADCVREF                   GPIO_Speed_50MHz
#define GPIOxPort_ADCVREF                   GPIOC
#define GPIOxBitx_ADCVREF                   GPIO_PIN_3

#define RCCPeriph_ADCLoadEXCV               RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCLoadEXCV               GPIO_Mode_AIN
#define GPIOSpeed_ADCLoadEXCV               GPIO_Speed_50MHz
#define GPIOxPort_ADCLoadEXCV               GPIOC
#define GPIOxBitx_ADCLoadEXCV               GPIO_PIN_4

#define RCCPeriph_ADCLoadEXCI               RCC_APB2_PERIPH_GPIOC
#define GPIOModeI_ADCLoadEXCI               GPIO_Mode_AIN
#define GPIOSpeed_ADCLoadEXCI               GPIO_Speed_50MHz
#define GPIOxPort_ADCLoadEXCI               GPIOC
#define GPIOxBitx_ADCLoadEXCI               GPIO_PIN_5


/****************************************/
/* ADC1/2 Sample Channel configuration */
/****************************************/
/**
  * @brief    Function             Port        ADC
  * @param    GEN_N----------------PA0---------ADC1
  * @param    GEN_U----------------PA1---------ADC1
  * @param    GEN_Droop------------PA2---------ADC12
  * @param    GEN_V----------------PA3---------ADC1
  * @param    GEN_W----------------PA4---------ADC2
  * @param    Power----------------PA5---------ADC2
  * @param    AUX------------------PA6---------ADC1
  * @param    ExciteVolt-----------PA7---------ADC2
  * @param    ExciteCurr-----------PB1---------ADC2
  * @param    Remote---------------PB2---------ADC2
  */

/* ADC Channel and Sample rate Config */
#define ACAD_ADC_Channel_GenU               ADC_CH_1   //ADC1-IN1-PA0
#define ACAD_ADC_Channel_GenV               ADC_CH_2   //ADC1-IN2-PA1
#define ACAD_ADC_Channel_GenEXCV            ADC_CH_11  //ADC12-IN11-PA2
#define ACAD_ADC_Channel_GenW               ADC_CH_4   //ADC1-IN4-PA3
#define ACAD_ADC_Channel_GenEXCI            ADC_CH_3   //ADC1-IN3-PA6
#define ACAD_ADC_Channel_LoadU              ADC_CH_6   //ADC12-IN6-PC0
#define ACAD_ADC_Channel_LoadV              ADC_CH_7   //ADC12-IN7-PC1
#define ACAD_ADC_Channel_LoadW              ADC_CH_8   //ADC12-IN8-PC2

#define ACAD_ADC_Channel_DroopA             ADC_CH_1   //ADC2-IN1-PA4
#define ACAD_ADC_Channel_DroopB             ADC_CH_2   //ADC2-IN2-PA5
#define ACAD_ADC_Channel_DroopC             ADC_CH_4   //ADC2-IN4-PA7
#define ACAD_ADC_Channel_BuildVoltAFT       ADC_CH_3   //ADC2-IN3-PB1
#define ACAD_ADC_Channel_BuildVoltBEF       ADC_CH_13  //ADC2-IN13-PB2
#define ACAD_ADC_Channel_VREF               ADC_CH_9   //ADC12-IN9-PC3
#define ACAD_ADC_Channel_LoadEXCV           ADC_CH_5   //ADC2-IN5-PC4
#define ACAD_ADC_Channel_LoadEXCI           ADC_CH_12  //ADC2-IN12-PC5


#define ACAD_ADC_SampleTime_VREF            ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_GenU            ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_GenV            ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_GenW            ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_DroopA          ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_DroopB          ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_DroopC          ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_LoadU           ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_LoadV           ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_LoadW           ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_GenEXCV         ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_GenEXCI         ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_LoadEXCV        ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_LoadEXCI        ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_BuildVoltAFT    ADC_SAMP_TIME_28CYCLES5
#define ACAD_ADC_SampleTime_BuildVoltBEF    ADC_SAMP_TIME_28CYCLES5

/* ADC Initial Params */
#define ACAD_ADC1_Mode                       ADC_WORKMODE_REG_SIMULT
#define ACAD_ADC1_MultiChannel							 ENABLE
#define ACAD_ADC1_ContinuousConvMode         DISABLE
#define ACAD_ADC1_ExternalTrigConv           ADC_EXT_TRIGCONV_T3_TRGO
#define ACAD_ADC1_DataAlign                  ADC_DAT_ALIGN_R
#define ACAD_ADC1_NbrOfChannel               ADC_RegularNumber

#define ACAD_ADC2_Mode                       ADC_WORKMODE_REG_SIMULT
#define ACAD_ADC2_MultiChannel							 ENABLE
#define ACAD_ADC2_ContinuousConvMode         DISABLE
#define ACAD_ADC2_ExternalTrigConv           ADC_EXT_TRIGCONV_NONE
#define ACAD_ADC2_DataAlign                  ADC_DAT_ALIGN_R
#define ACAD_ADC2_NbrOfChannel               ADC_RegularNumber

/* ADC1 Regular Rule */
#define ACAD_ADC1_Regular1_Channel            ACAD_ADC_Channel_GenU
#define ACAD_ADC1_Regular1_Order              1
#define ACAD_ADC1_Regular1_SampleTime         ACAD_ADC_SampleTime_GenU

#define ACAD_ADC1_Regular2_Channel            ACAD_ADC_Channel_GenV    
#define ACAD_ADC1_Regular2_Order              2
#define ACAD_ADC1_Regular2_SampleTime         ACAD_ADC_SampleTime_GenV   

#define ACAD_ADC1_Regular3_Channel            ACAD_ADC_Channel_GenW
#define ACAD_ADC1_Regular3_Order              3
#define ACAD_ADC1_Regular3_SampleTime         ACAD_ADC_SampleTime_GenW

#define ACAD_ADC1_Regular4_Channel            ACAD_ADC_Channel_LoadU
#define ACAD_ADC1_Regular4_Order              4
#define ACAD_ADC1_Regular4_SampleTime         ACAD_ADC_SampleTime_LoadU

#define ACAD_ADC1_Regular5_Channel            ACAD_ADC_Channel_LoadV
#define ACAD_ADC1_Regular5_Order              5
#define ACAD_ADC1_Regular5_SampleTime         ACAD_ADC_SampleTime_LoadV

#define ACAD_ADC1_Regular6_Channel            ACAD_ADC_Channel_LoadW
#define ACAD_ADC1_Regular6_Order              6
#define ACAD_ADC1_Regular6_SampleTime         ACAD_ADC_SampleTime_LoadW

#define ACAD_ADC1_Regular7_Channel            ACAD_ADC_Channel_GenEXCV
#define ACAD_ADC1_Regular7_Order              7
#define ACAD_ADC1_Regular7_SampleTime         ACAD_ADC_SampleTime_GenEXCV

#define ACAD_ADC1_Regular8_Channel            ACAD_ADC_Channel_GenEXCI
#define ACAD_ADC1_Regular8_Order              8
#define ACAD_ADC1_Regular8_SampleTime         ACAD_ADC_SampleTime_GenEXCI

/* ADC2 Regular Rule */
#define ACAD_ADC2_Regular1_Channel            ACAD_ADC_Channel_DroopA
#define ACAD_ADC2_Regular1_Order              1
#define ACAD_ADC2_Regular1_SampleTime         ACAD_ADC_SampleTime_DroopA

#define ACAD_ADC2_Regular2_Channel            ACAD_ADC_Channel_DroopB
#define ACAD_ADC2_Regular2_Order              2
#define ACAD_ADC2_Regular2_SampleTime         ACAD_ADC_SampleTime_DroopB

#define ACAD_ADC2_Regular3_Channel            ACAD_ADC_Channel_DroopC
#define ACAD_ADC2_Regular3_Order              3
#define ACAD_ADC2_Regular3_SampleTime         ACAD_ADC_SampleTime_DroopC

#define ACAD_ADC2_Regular4_Channel            ACAD_ADC_Channel_VREF
#define ACAD_ADC2_Regular4_Order              4
#define ACAD_ADC2_Regular4_SampleTime         ACAD_ADC_SampleTime_VREF

#define ACAD_ADC2_Regular5_Channel            ACAD_ADC_Channel_BuildVoltAFT
#define ACAD_ADC2_Regular5_Order              5
#define ACAD_ADC2_Regular5_SampleTime         ACAD_ADC_SampleTime_BuildVoltAFT

#define ACAD_ADC2_Regular6_Channel            ACAD_ADC_Channel_BuildVoltBEF
#define ACAD_ADC2_Regular6_Order              6
#define ACAD_ADC2_Regular6_SampleTime         ACAD_ADC_SampleTime_BuildVoltBEF

#define ACAD_ADC2_Regular7_Channel            ACAD_ADC_Channel_LoadEXCV
#define ACAD_ADC2_Regular7_Order              7
#define ACAD_ADC2_Regular7_SampleTime         ACAD_ADC_SampleTime_LoadEXCV

#define ACAD_ADC2_Regular8_Channel            ACAD_ADC_Channel_LoadEXCI
#define ACAD_ADC2_Regular8_Order              8
#define ACAD_ADC2_Regular8_SampleTime         ACAD_ADC_SampleTime_LoadEXCI

/****************************************/
/* DMA configuration */
/****************************************/
#define ACAD_DMA                         DMA1
#define ACAD_DMA_Channel                 DMA1_CH1
#define ACAD_DMA_Channel_IT              DMA_INT_TXC
#define ACAD_DMA_IT_Mode                 DMA1_INT_TXC1
#define ACAD_DMA_FLAG_Mode               DMA1_FLAG_TC1

#define ADC_DR_Address                    ((uint32_t)&ADC1->DAT)
#define ACAD_DMA_PeripheralBaseAddr       ((uint32_t)ADC_DR_Address)
#define ACAD_DMA_MemoryBaseAddr           ((uint32_t)&ADCConvertedValueTab1)
#define ACAD_DMA_DIR                      DMA_DIR_PERIPH_SRC
#define ACAD_DMA_BufferSize               ADCDMATotalNum
#define ACAD_DMA_PeripheralInc            DMA_PERIPH_INC_DISABLE
#define ACAD_DMA_MemoryInc                DMA_MEM_INC_ENABLE
#define ACAD_DMA_PeripheralDataSize       DMA_PERIPH_DATA_SIZE_WORD
#define ACAD_DMA_MemoryDataSize           DMA_MemoryDataSize_Word
#define ACAD_DMA_Mode                     DMA_MODE_NORMAL
#define ACAD_DMA_Priority                 DMA_PRIORITY_VERY_HIGH
#define ACAD_DMA_M2M                      DMA_M2M_DISABLE


/****************************************/
/* NVIC configuration */
/****************************************/
#define ACAD_NVIC_IRQChannel              DMA1_Channel1_IRQn
#define ACAD_NVIC_IRQPrePrio              0x08
#define ACAD_NVIC_IRQSubPrio              0x0C


/**
  * @brief Functions
  */
ACAD_DRIVER_EXT uint8_t ACAD_HWInit(void);
ACAD_DRIVER_EXT uint8_t ACAD_HWEnable(void);


#ifdef __cplusplus
}
#endif


#endif   /*   ACAD_DRIVER_EXT   */